P-i-n and n-i-p Devices

P-i-n and n-i-p Devices

Typically amorphous silicon thin-film cells use a p-i-n structure,wheras cdTe cells use an n-i-p structure.The basic scenario is as follows:A three-layer sandwich is created,with a middle intrinsic (i-type or undoped)layer between an n-type layer and a p-type layer.This geometry sets up an electric field between the p-type and n-type regions that stretches across the middle intrinsic resistive region.Light generates free electrons and holes in the intrinsic region,which are then separated by the electric field.

In the p-i-n amorphous silicon(a-si) cell,the top layer is p-type a-si,the middle layer is intrinsic silicon,and the bottom layer is n-type a-si.Amorphous silicon has many atomic-level electrical defects when it is highly conductive .So very little current would flow if an a-si cell had to depend on diffusion.However,in a p-i-n cell,current flows because the free electrons and holes are generated within the influence of an electric field,rather than having to move toward the field.

In a CdTe cell,the device structure is similar to the a-si cell,except the order of layer is flipped upside down.Specifically,is a typical cdTe cell,the top layer is p-type cadmium sulfide (cds),the middle layer is intrinsic cdTe,and the bottom layer is n-type zinc telluride(znTe).